Buffer, ReDriver 2 Channel 1MHz 10-TSSOP
The PCA9615 is a Fast-mode Plus (Fm+) SMBus/I2C-bus buffer that extends the normal
single-ended SMBus/I2C-bus through electrically noisy environments using a differential
SMBus/I2C-bus (dI2C) physical layer, which is transparent to the SMBus/I
2C-bus protocol
layer. It consists of two single-ended to differential driver channels for the SCL (serial
clock) and SDA (serial data).
The use of differential transmission lines between identical dI
2C bus buffers removes
electrical noise and common-mode offsets that are present when signal lines must pass
between different voltage domains, are bundled with hostile signals, or run adjacent to
electrical noise sources, such as high energy power supplies and electric motors.
The SMBus/I2C-bus was conceived as a simple slow speed digital link for short runs,
typically on a single PCB or between adjacent PCBs with a common ground connection.
Applications that extend the bus length or run long cables require careful design to
preserve noise margin and reject interference.
The dI2C-bus buffers were designed to solve these problems and are ideally suited for
rugged high noise environments and/or longer cable applications, allow multiple targets,
and operate at bus speeds up to 1 MHz clock rate. Cables can be extended to at least
3 meters (3 m), or longer cable runs at lower clock speeds. The dI2C-bus buffers are
compatible with existing SMBus/I2C-bus devices and can drive Standard, Fast-mode, and
Fast-mode Plus devices on the single-ended side.
Signal direction is automatic, and requires no external control. To prevent bus latch up,
the standard SMBus/I2C-bus side of the bus buffer, the PCA9615 employs static offset,
care should be taken when connecting these to other SMBus/I2C-bus buffers that may
not operate with offset.
This device is a bridge between the normal 2-wire single-ended wired-OR SMBus/I2Cbus and the 4-wire dI2C-bus.
Additional circuitry allows the PCA9615 to be used for โhot swapโ applications, where
systems are always on, but require insertion or removal of modules or cards without
disruption to existing signals.
The PCA9615 has two supply voltages, VDD(A) and VDD(B). VDD(A), the card side supply,
only serves as a reference and ranges from 2.3 V to 5.5 V. VDD(B), the line side supply,
serves as the majority supply for circuitry and ranges from 3.0 V to 5.5 V.
Key Features
2-channel differential IยฒC/SMBus buffer
Supports:
Standard-mode
Fast-mode
Fast-mode Plus (Fm+) up to 1 MHz
Converts:
Single-ended SDA/SCL โ differential dIยฒC
Improved noise immunity using differential signaling
Supports long cable communication:
Up to approximately 3 meters or longer at lower speeds
Hot-swap capability for live insertion/removal of modules
Bus idle detection before reconnection
Supports:
Clock stretching
Arbitration
Multi-drop bus configurations
Wide supply voltage range:
VDD(A): 2.3 V to 5.5 V
VDD(B): 3.0 V to 5.5 V
5.5 V tolerant IยฒC pins
Operates from -40ยฐC to +85ยฐC
Package:
10-pin TSSOP / MSOP
Designed for electrically noisy systems and ground offset environments
#CommonPartsLibrary #IntegratedCircuit
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